chk8015 - 99f ref. : dschk80156315 - 10 nov 16 1 / 8 specifications subject to change without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com 16w power transistor gan hemt on sic description the chk8015 - 99f is a 16 w gallium nitride high electron mobility transistor . this product offers a general purpose and broadband solution for a variety of rf power applications. the circuit is manufactured with a 0 .25m gate length gan hemt technology on sic substrate . it is proposed in a bare die fo rm and requires an external matching circuitry. main features d = 30v @i d_q = 200 ma main electrical characteristics t ref = +25c, cw mode, freq = 9ghz, v ds = 30v, i d_q = 200ma symbol parameter min typ max unit g ss small signal gain 1 7 db p sat saturated output power 20 w pae max power added efficiency 68 % g pae_max associated gain at max pae 1 1 db these values are deduced from elementary power cell performances
chk8015 - 99f 16w power transistor ref. : dschk80156315 - 10 nov 16 2 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com recommended operating ratings t ref = +25c symbol parameter min typ max unit conditions v ds drain to source voltage 30 v v gs gate to source voltage - 3.3 v v d s =30v, i d_q =200ma v dg_peak drain - gate voltage 80 v dc+rf v gs_peak gate - source voltage - 20 v dc+rf i d_q quiescent drain current 0.2 0.46 a v d s =30v i d_max drain current 1 (1) a v d s =30v, compressed mode i g_max gate current in forward mode 0 16 ma dc or compressed mode t j_max junction temperature 200 c (1) (1) power dissipation must be considered dc characteristics t ref = +25c symbol parameter min typ max unit conditions v p pinch - off voltage - 4 - 3.4 - 2.8 v v d =10v,i d = i dss /100 i d_sat saturated drain current 3.6 a (1) , v d =10v, v g =1v i g_leak gate leakage current - 0.8 ma v d =50v, v g = - 7v v bdg drain - gate break - down voltage 120 v v g = - 7v, i d =20ma r th thermal resistance 6 c/w cw mode, t ref =75c, (2) (1) for information, limited by i d_max , see on ror & amr (2) the thermal resistance is given for the power bar mounted on carrier plate (20m au/sn soldering + 1.4mm cu/mo/cu). the reference temperature is defined on the carrier back side. thermal analysis is highly recommended, more details are available on request. rf characteristics t ref = +25c, cw mode, freq = 9ghz, v ds = 30v, i d_q = 200ma symbol parameter min typ max unit conditions g ss small signal gain 1 7 db p sat saturated output power 20 w pae max power added efficiency 68 % g pae_max associated gain at max pae 1 1 db these values are deduced from elementary power cell performances
16w power transistor chk8015 - 99f ref. : dschk80156315 - 10 nov 16 3 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com absolute maximum ratings t ref = +25c (1) (2) (3) symbol parameter rating unit note v ds _q drain - source biasing voltage 55 v v gs _q gate - source biasing voltage - 10, +2 v v dg_peak drain - gate voltage (dc+rf) 120 v v gs_peak gate - source voltage (dc+rf) - 25 v i g_max maximum gate current 32 ma i g_min minimum gate current - 2 ma i d_max maximum drain current see note a (4) p in maximum input power see note dbm (5) t j maximum junction temperature 230 c t stg storage temperature - 55 to +150 c t case case operating temperature see note c (4) (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s. (3) the given values must not be exceeded at the same time even momentarily for any parameter, since each parameter is independent from each other, otherwise deterioration or destruction of the device may take place. (4) max junction temperature must be considered (5) linked to and limited by ig_max & ig_min values. maximum input power depends on frequency and should not exceed 2db above pae_max.
chk8015 - 99f 16w power transistor ref. : dschk80156315 - 10 nov 16 4 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com power bar description the devi ce is composed of 4 elementary 4 w cells. these cells are connected together with a specific network providing a good trade - off bet ween performance and stability (resistance between gates and drains as described on the schematic ). the reference plans are on the center of the bonding pads. a multiport non - linear model is available on request. 4 - cells power bar g1 g2 d1 d2 g1 g2 d1 d2 g4 d3 d4 g3 g3 g4 d3 d4
16w power transistor chk8015 - 99f ref. : dschk80156315 - 10 nov 16 5 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com elementary cell maximum gain & stability characteristics t ref = +25c, v ds = +30v, i d_q = 50ma, simulated results elementary cell load pull performances t ref = +25c, v ds = +30v, i d_q = 50ma, simulated results the impedances are chosen as a trade - off between output power, pae and stability of the device. second harmonic of output load has been tuned. these values are given in the bonding pads reference plan . frequency (ghz) zs zl gain (db) @pae max pae max (%) pout (w) @pae max pout max (w) 3 15 + j18 60 + j65 12.8 72 4.9 5.3 6 8.2 + j14.8 24.8 + j51.7 12.4 69 4.4 5 9 2.8 + j6.4 11.7 + j33.7 10.8 68 4.7 5.1 12 2.1 + j3.5 8 + j24 10 52 3.8 4.8 15 1.87 + j0 5 + j17.3 8.6 50 3.6 4.7 18 1.7 C zl zs 0 1 2 3 4 5 6 7 0 5 10 15 20 25 30 35 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 k factor mag (db) frequency (ghz) k factor mag k factor mag
chk8015 - 99f 16w power transistor ref. : dschk80156315 - 10 nov 16 6 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com mechanical data chip thickness: 100m +/ - 10 m all dimensions are in micrometers gnd pads (1, 3, 5, 7, 9, 10, 12, 14, 16, 18 ) = 99 x 130 m2 dc gate pads (2, 4, 6, 8) = 214 x 120m2 dc drain pads ( 11 , 13 , 15 , 1 7 ) = 214 x 120 m2 1 2 3 4 6 5 7 8 9 18 17 16 15 13 14 12 11 10
16w power transistor chk8015 - 99f ref. : dschk80156315 - 10 nov 16 7 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com notes
chk8015 - 99f 16w power transistor ref. : dschk80156315 - 10 nov 16 8 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 - www.ums - gaas.com qualification domain this part is qualified according to ums standards, excluding humid environment. user guide for mmic storage , pick & place , die attach , wire bonding refe r to the application note an0001 available at http://www.ums - gaas.com for general recommendations on chip handling . recommended environmental management ums products are compliant with the regulation in particular with the directives rohs n2011/65 and reach n1907/2006. more environmental data are available in the application note an0019 also available at http://www.ums - gaas.com . recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. user guide gan power bars assembly guide lines refer to the application note an0026 available at http://www.ums - gaas.com for general re commendations on sic transistor handling and assembly. ordering information chip form : chk8015 - 99f /00 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithi c semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.
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